Design Perfection from the Start

11:00 am - 11:30 am | Orchestrate an AI LLM Workflow with Altair® FlowTracer™

Dee Lin, Lead Principal Solution Architect, Altair

Since chatGPT met the world, generative AI large language model has gotten on the center stage of technology world. In this short presentation, we are going to showcase how Altair FlowTracer can help orchestrate LLM training workflow to help AI training staff get to desired results.

11:30 am - 12:00 pm | Optimized Scheduling for Hardware Emulation with Altair® Hero™

Prasanna Chalgeri, Solutions Architect, Altair

Hardware emulators represent a significant investment for chip design houses, often being the most expensive assets they possess. With the increasing complexity and scale of emulators, utilizing basic or standard schedulers to manage jobs is no longer viable for achieving optimal ROI. Hero 2.0 stands out by offering best-in-class, emulator-agnostic scheduling. It addresses critical challenges such as sharing emulators efficiently, solving the Tetris packaging and placement problem and managing constraints effectively, ensuring that organizations maximize their emulator usage and investment.

2:00 pm - 2:30 pm | Altair® SimLab® for Electronics: Unleashing the Power of 3D IC Optimization with Altair's Cutting-Edge Multiphysics Suite

Iyad Rayane, Senior Product Specialist, Altair

Stacking multiple dies, 3D ICs offer enhanced functionality, reduced form factor, and improved interconnect density. However, these advancements come with several challenges, including thermal management issues.

Vertical stacking of dies in 3D ICs introduces thermal stress causing mechanical failures, including delamination, warpage, and cracking, impairing the reliability of the system which represent new challenges to EDA tools and design flow in general.

Altair SimLab for Electronics assists designers to simulate and optimize thermal management strategies, minimize thermal stress-induced failures, and ultimately facilitating the successful implementation of 3D IC technologies in advanced electronic systems.

2:30 pm - 3:00 pm | Predict Simulation Results from Past Designs with Altair® physicsAI™

Evan Christensen, Senior Technical Account Manager, Altair

PhysicsAI accelerates design quality by enabling rapid design screening. Leveraging past simulation data, PhysicsAI empowers all engineers to identify potential issues early, reducing reliance on traditional back-and-forth and increasing iterations within a design cycle.

11:00 am - 11:30 am | Meteor Crashes into the EDA Market - Sorry Dinosaurs!

Joe Costello, Metrics, Kwikbit, Arrikto, Acromove

Almost nothing has changed about the digital simulation model for the last 35 years.   Designers and design teams have been frustrated by the same problems for an entire generation.   Single licenses of state of the art HDL simulators are very expensive.   When it comes time to tape out a design, the design schedule is limited by the number of available software licenses or compute servers, or both.   In other markets these problems have been solved by cloud computing coupled with SaaS business models but EDA has barely budged in that direction.   Come hear how Metrics is turning this world upside down.  And these aren't empty words and promises. You will walk away more productive than from any other session at DAC this year or in the past.   Come join the revolution.  DSim For All.

11:30 am - 12:00 pm | Altair® SimLab® for Electronics: Conquer the 3D IC Package Parasitic Extraction challenge with Flux PE and Unleash Precision with HyperSpice Simulation

Iyad Rayane, Senior Product Specialist, Altair

Interconnect parasitic extraction is a crucial step in the design and analysis of IC Packaging and power devices. In IC packages and power devices, parasitic elements can introduce undesired effects such as resistance, capacitance, and inductance. These parasitic elements can increase power consumption, cause delays, and lead to electromagnetic interference (EMI) issues. Therefore, accurately modeling and accounting for these parasitic are essential for ensuring the proper functionality and performance of the device.

In this presentation, we will show how Altair can help in accurately modeling and simulating the parasitic in the interconnect of IC package and power modules.

2:00 pm - 2:30 pm | ECAD to 3D PCB results in a Day with Altair® SimLab®

Evan Christensen, Senior Technical Account Manager, Altair

Traditional 3D PCB simulations require meshing, a time-consuming step for accurate results. SimLab eliminates meshing entirely, significantly reducing pre-processing time. Its efficient iterative solving technique tackles large models, empowering engineers to evaluate iterations faster in design cycles.

2:30 pm - 3:00 pm | Solutions for Digital, Analog and Mixed-Signal SoC Debug

Gerhard Angst, Vice President, EDA and Industrial Solutions, Altair

Electronic design is a very complex, time-consuming activity, which is exacerbated by the increasing complexity of modern semiconductor designs. Altair's Silicon Debug Tools uniquely handle an exceptional range of design abstractions from RTL via gate level to transistor level, for both analog and digital disciplines. See how Altair's latest debug and simulation tools accelerate semiconductor development and help companies move silicon devices into production earlier and with a higher degree of confidence.